With increasingly widespread application of semiconductor chips, more factors can cause electrostatic damages to semiconductor chips. In conventional chip design, electrostatic discharge (ESD) protection circuit is often used to protect circuits and to reduce chip damages. The design and application of conventional electrostatic protection circuits often include gate grounded NMOS (GGNMOS) protection circuits, shallow trench isolation diode (STI diode) protection circuits, gated diode protection circuits, laterally diffused MOS (LDMOS) protection circuits, bipolar junction transistor (BJT) protection circuits, etc.
As the development of semiconductor technology, the dimensions of semiconductor devices continue to decrease, and device density continues to increase. Conventional ESD protection circuits can no long meet the requirements of semiconductor technology. Fin field-effect-transistors (FinFETs) are desired in ESD protection circuits.
However, as the dimensions of the semiconductor devices continue to decrease, even though FinFETs are applied in ESD protection circuits, these ESD protection circuits still have unstable performances.
The disclosed ESD protection device and the fabrication method to form the ESD protection device are directed to solve one or more problems set forth above and other problems.